2011-04-06, 08:08:41
(2011-04-05, 22:15:36)Mikael Gustafsson Wrote: Unless you know exactly what you do and you have a good reason to, DON'T write configs.
Please try that first.
My friend, as you said, I did not write configs, but not again. my code is working but bootloader is canceled
Can I make a request from you?
There is a Bootloader code and small code example below.
My Code:
Code:
//**************CCS V4.114*****************
#include <18F452.h>
#fuses XT,NOWDT,NOPROTECT,NOBROWNOUT,NOLVP,NOPUT,NOWRT,NODEBUG,NOCPD
#use delay(clock=10000000)
#use fast_io(a)
#use fast_io(d)
#include "2x16_4x20_LCD.c"
//=========================================================================================
void main()
{
set_tris_a(0b00000111);
set_tris_d(0b00000000);
output_d(0x00);
delay_ms(10);
lcd_init();
while(TRUE)
{
LCD_gotoxy(3,1);
printf(lcd_putc,"ds30 Loadre");
LCD_gotoxy(1,2);
printf(lcd_putc,"Download Example");
}
}Bootloader:
Code:
;------------------------------------------------------------------------------
; Includes
;------------------------------------------------------------------------------
#include "settings.inc"
;------------------------------------------------------------------------------
; UARTs
;------------------------------------------------------------------------------
#ifndef USE_UART1
#ifndef USE_UART2
#ifndef USE_CAN
error "No communication is specified"
#endif
#endif
#endif
#ifdef USE_CAN
#ifndef HAS_CAN
error "CanBus specified for a device that only has uart"
#endif
#ifdef USE_UART1
error "UART1 and Canbus specified"
#endif
#ifdef USE_UART2
error "UART2 and Canbus specified"
#endif
#ifdef USE_TXENABLE
error "TX enable is not available for CAN"
#endif
#endif
#ifdef USE_UART1
#ifdef USE_UART2
error "Both uarts are specified"
#endif
#ifdef TXSTA
#define TXSTA_ TXSTA ;uart status
#define RCSTA_ RCSTA ;uart status
#define SPBRG_ SPBRG ;uart baudrate
#define TXREG_ TXREG ;uart transmit
#define RCREG_ RCREG ;uart receive
else
#define TXSTA_ TXSTA1 ;uart status
#define RCSTA_ RCSTA1 ;uart status
#define SPBRG_ SPBRG1 ;uart baudrate
#define TXREG_ TXREG1 ;uart transmit
#define RCREG_ RCREG1 ;uart receive
#endif
#endif
#ifdef USE_UART2
#ifdef USE_UART1
error "Both uarts are specified"
#endif
#ifndef HAS_UART2
error "UART2 specified for a device that only has uart1"
#endif
#define TXSTA_ TXSTA2 ;uart status
#define RCSTA_ RCSTA2 ;uart status
#define SPBRG_ SPBRG2 ;uart baudrate
#define TXREG_ TXREG2 ;uart transmit
#define RCREG_ RCREG2 ;uart receive
#endif
;------------------------------------------------------------------------------
; Defines
;------------------------------------------------------------------------------
#define VERMAJ 2 ;firmware version major
#define VERMIN 0 ;firmware version minor
#define VERREV 3 ;firmware version revision
#define HELLO 0xC1
#define OK 'K' ;erase/write ok
#define CHECKSUMERR 'N' ;checksum error
#define VERFAIL 'V' ;verification failed
#define BLPROT 'P' ;bl protection tripped
#define UCMD 'U' ;unknown command
#define BL10MS ( 10 * (OSCF / 4000) / (255 * 7) ) ;10ms delay
#define BLSTART ( BLINIT / 10 ) ;count for boot receive delay
#define BLDELAY ( BLTIME / 10 ) ;count for receive delay
#define UBRG ( (((OSCF / BAUDRATE) / 8) - 1) / 2 ) ;baudrate
#define PAGESIZEW 32 ;pagesize [words]
#define PAGESIZER (PAGESIZEW/ROWSIZEW) ;pagesize [rows]
#define ROWSIZEB (ROWSIZEW*2) ;rowsize [bytes]
#define STARTADDR ( MAX_FLASH - BLPLP * PAGESIZER * ROWSIZEW * 2 ) ;bootloader placement
; Debug output
;messg STARTADDR_IS #(STARTADDR)
;messg UBRG_IS #v(UBRG)
;messg bldelayis #v(BLDELAY)
;messg blstartis #v(BLSTART)
;------------------------------------------------------------------------------
; Range check
;------------------------------------------------------------------------------
if UBRG > 255
error spbrg_value_ is out of range
#endif
if UBRG == 0
error spbrg_value_ might be out of range
#endif
if BLSTART > 255
error BLSTART_ is out of range
#endif
if BLSTART == 0
error spbrg_value_ might be out of range
#endif
if BLDELAY > 255
error BLDELAY_ is out of range
#endif
if BLDELAY == 0
error BLDELAY_ might be out of range
#endif
;------------------------------------------------------------------------------
; Variables
;------------------------------------------------------------------------------
cblock 0
crc ;receive checksum
dcnt ;datacount
cnt1 ;receive timeout timer
cnt2 ;receive timeout timer
cnt3 ;receive timeout timer
cntHello ;
rowcnt ;row iterator
rowcnt2 ;
cmd ;command
doerase ;do erase before next write
ttblptru
ttblptrh
ttblptrl
;endc
;cblock 10
buffer:65 ;receive buffer
endc
;------------------------------------------------------------------------------
; Send macro
;------------------------------------------------------------------------------
SendL macro sbyte
movlw sbyte
rcall Send
endm
;------------------------------------------------------------------------------
; Reset vector
;------------------------------------------------------------------------------
org 0x0000
goto blstart
;------------------------------------------------------------------------------
; GOTO user application
;------------------------------------------------------------------------------
org STARTADDR - 4 ;space to deposit goto to user application
loadusr nop
nop
;------------------------------------------------------------------------------
; Start of bootloader code
;------------------------------------------------------------------------------
org STARTADDR
blstart
;----------------------------------------------------------------------
; User init
;----------------------------------------------------------------------
; Enable digital i/o
#ifdef ADCON1
; error Do you need to configura uart pins to be digital? If not, remove this line
#endif
;movlw b'01100000' ;xxx disable
;movwf ADCON1 ;xxx analog on tx/rx
; Set internal oscillator to 8MHz
;movlw b'01110000'
;movwf OSCCON
; Make tx enable pin output and set to 0
#ifdef USE_TXENABLE
bcf TRISR_TXE, TRISB_TXE
bcf LATR_TXE, LATB_TXE
#endif
;----------------------------------------------------------------------
; Init
;----------------------------------------------------------------------
clrf doerase
; Uart
#ifndef USE_CAN
movlw b'00100100' ;enable transmit and
movwf TXSTA_ ; high speed mode
movlw UBRG ;use only SPBRG_ (8 bit mode default) not using BAUDCON
movwf SPBRG_
movlw b'10010000' ;enable serial port
movwf RCSTA_ ; and receive
#endif
#ifdef USE_CAN
bsf PORTB, RB2
bcf TRISB, RB2
movlb 15
movlw b'00000001'
movwf TXB0DLC,BANKED
;xxx If transmit ID & receive ID are the same then comment lines marked with * (free 2 instructions)
movlw (ID_GUI<<5)&0xE0 ;Load SID2:SID0, EXIDE = 0 / User configure transmit ID
movwf TXB0SIDL,BANKED
movlw (ID_PIC<<5)&0xE0 ;Load SID2:SID0, EXIDE = 0 / User configure receive ID *
movwf RXF0SIDL, BANKED
movlw ID_GUI>>3 ;Load SID10:SID3 / User configure transmit ID
movwf TXB0SIDH,BANKED
movlw ID_PIC>>3 ;Load SID10:SID3 / User configure receive ID *
movwf RXF0SIDH, BANKED
movlw b'11111111' ;Prevent filter 1 from causing a
movwf RXF1SIDL ; receive event
movwf RXM0SIDH ;Set mask
movlw b'11100000'
movwf RXM0SIDL
movlb 0 ;Set bit rate
movlw b'00000001' ;xxx User configure Baudrate (Default 500kBd with HSPLL and 10MHz crystal)
movwf BRGCON1
movlw b'11111010' ;xxx User configure Baudrate
movwf BRGCON2
movlw b'00000111' ;xxx User configure Baudrate
movwf BRGCON3
bsf CIOCON, ENDRHI
clrf CANCON ;Enter Normal mode
#endif
;----------------------------------------------------------------------
; Wait for computer
;----------------------------------------------------------------------
clrf cntHello
movlw BLSTART
rhello rcall RcvIni
sublw HELLO
bz sendid
; Not hello received
incf cntHello
movf cntHello
sublw HELLOTRIES
bz exit
bra rhello
;----------------------------------------------------------------------
; Send device id and firmware version
;----------------------------------------------------------------------
sendid SendL DEVICEID
SendL (VERMAJ + 128) ;128 to indicate PIC18F
SendL ((VERMIN<<4) + VERREV)
;----------------------------------------------------------------------
; Main loop
;----------------------------------------------------------------------
Main SendL OK ; "-Everything OK, ready and waiting."
mainl clrf crc
;----------------------------------------------------------------------
; Receive address
;----------------------------------------------------------------------
;Upper byte
rcall Receive
movwf TBLPTRU
; High byte
rcall Receive
movwf TBLPTRH
#ifdef BIGEE
movwf EEADRH ;for eeprom
#endif
; Low byte
rcall Receive
movwf TBLPTRL
#ifdef EEADR
movwf EEADR ;for eeprom
#endif
;----------------------------------------------------------------------
; Receive command
;----------------------------------------------------------------------
rcall Receive
movwf cmd
;----------------------------------------------------------------------
; Receive nr of data bytes that will follow
;----------------------------------------------------------------------
rcall Receive
movwf dcnt
;----------------------------------------------------------------------
; Receive data
;----------------------------------------------------------------------
lfsr FSR0, buffer ;load buffer pointer to fsr0
rcvoct rcall Receive
movwf POSTINC0
decfsz dcnt
bra rcvoct
;----------------------------------------------------------------------
; Check checksum
;----------------------------------------------------------------------
chksum tstfsz crc
bra crcfail
;----------------------------------------------------------------------
; 0x00 goto protection
;----------------------------------------------------------------------
#ifdef PROT_GOTO
; Only for write row command
;btfss cmd, 1
;bra ibufpt
; Check for row 0
tstfsz TBLPTRU
bra ibufpt
tstfsz TBLPTRH
bra ibufpt
tstfsz TBLPTRL
bra ibufpt
; Init buffer pointer
lfsr FSR0, buffer ;load buffer pointer to fsr0
; 1st word low byte = low address byte
movlw ((STARTADDR>>1)&0xff)
movwf POSTINC0
; 1st word high byte = goto instruction
movlw 0xef
movwf POSTINC0
; 2nd word low byte = upper address byte
movlw (((STARTADDR>>1)&0xff00)>>8)
movwf POSTINC0
; 2nd word high byte = uppder address nibble + goto instruction
movlw (0xf0 + (((STARTADDR>>1)&0xf0000)>>16))
movwf POSTINC0
#endif
;----------------------------------------------------------------------
; Init buffer pointer
;----------------------------------------------------------------------
ibufpt lfsr FSR0, buffer ;load buffer pointer to fsr0
;----------------------------------------------------------------------
; Check command
;----------------------------------------------------------------------
; Erase page, set do erase status flag
btfss cmd, 0
bra cmdrow
setf doerase
bra Main
; Write row
cmdrow btfsc cmd, 1
bra blprot
#ifdef EEDATA
; Write eeprom word
btfsc cmd, 2
bra eeprom
#endif
; Write config
btfsc cmd, 3
bra cfg
; Else, unknown command
SendL UCMD
bra mainl
;------------------------------------------------------------------------------
; Exit, placed here so it can be branched to from all code, max +-127
;------------------------------------------------------------------------------
#ifndef USE_CAN
exit clrf RCSTA_ ;reset receive status and control register
clrf TXSTA_ ;reset transmit status and control register
#endif
#ifdef USE_CAN
exit bsf CANCON, REQOP2 ;reset receive status and control register
#endif
bra loadusr
;----------------------------------------------------------------------
; Bootloader protection
;----------------------------------------------------------------------
blprot nop
#ifdef PROT_BL
; Make a copy of address
movff TBLPTRU, ttblptru
movff TBLPTRH, ttblptrh
movff TBLPTRL, ttblptrl
; Calculate page number of received address
movlw 6 ;2^6=64=pagesize[bytes]
movwf cnt1
bcf STATUS, C ;clear carry bit
calcpage rrcf ttblptru, 1
rrcf ttblptrh, 1
rrcf ttblptrl, 1
decfsz cnt1
bra calcpage
; Received page high < bl start page = OK
movlw ((STARTADDR/64)>>8)
subwf ttblptrh, 0
bn blprotok
; Received page = bl start page
movlw ((STARTADDR/64)>>8)
subwf ttblptrh, 0
bnz chkgt
; Received page low < bl start page low = OK
movlw ((STARTADDR/64)&0xff)
subwf ttblptrl, 0
bn blprotok
; Received page high > bl end page = OK
chkgt movlw (((STARTADDR/64)+BLSIZEP-1)>>8)
subwf ttblptrh, 0
bz chkgt2
bn chkgt2
bra blprotok
; Received page = bl end page
chkgt2 movlw (((STARTADDR/64)+BLSIZEP-1)>>8)
subwf ttblptrh, 0
bnz proterr
; Received page low > bl end page low = OK
movlw (((STARTADDR/64)+BLSIZEP-1)&0xff)
subwf ttblptrl, 0
bz proterr
bn proterr
bra blprotok
; Protection tripped
proterr SendL BLPROT
bra mainl
#endif
;----------------------------------------------------------------------
; Erase page
;----------------------------------------------------------------------
blprotok
erase btfss doerase, 0
bra wrloop
movlw b'10010100' ;setup erase
rcall Write
clrf doerase
;----------------------------------------------------------------------
; Write row
;----------------------------------------------------------------------
wrloop movlw ROWSIZEB
movwf rowcnt
movwf rowcnt2
; Load latches
wrbyte movff POSTINC0, TABLAT
tblwt *+
decfsz rowcnt
bra wrbyte
; Write
tblrd *- ;point back into row
movlw b'10000100'
rcall Write
;----------------------------------------------------------------------
; Write finished, verify row
;----------------------------------------------------------------------
lfsr FSR0, (buffer+ROWSIZEB-1) ;load buffer pointer to fsr0
; Read
verbyte tblrd *-
movf POSTDEC0, w
; Compare
cpfseq TABLAT
bra verfail
; Loop?
decfsz rowcnt2
bra verbyte
; Verify succesfull
bra Main
;----------------------------------------------------------------------
; Write eeprom byte
;----------------------------------------------------------------------
#ifdef EEADR
; Load latch
eeprom movff INDF0, EEDATA
; Write
movlw b'00000100'
rcall Write
; Verify, read byte
movlw b'00000001'
bsf EECON1, RD
movf INDF0, w
; Compare
cpfseq EEDATA
bra verfail
; Verify succesfull
bra Main
#endif
;----------------------------------------------------------------------
; Write config byte
;----------------------------------------------------------------------
; Load latch
cfg movff INDF0, TABLAT
tblwt *
; Write
movlw b'11000100'
rcall Write
; Write finished
bra Main
;----------------------------------------------------------------------
; Verify fail
;----------------------------------------------------------------------
verfail SendL VERFAIL
bra mainl
;----------------------------------------------------------------------
; Checksum error
;----------------------------------------------------------------------
crcfail SendL CHECKSUMERR
bra mainl
;------------------------------------------------------------------------------
; Write()
;------------------------------------------------------------------------------
Write movwf EECON1
movlw 0x55
movwf EECON2
movlw 0xAA
movwf EECON2
bsf EECON1, WR
; Wait for write to finish, only needed for eeprom
waitwre btfsc EECON1, WR
bra waitwre
bcf EECON1,WREN ;disable writes
return
;------------------------------------------------------------------------------
; Send()
;------------------------------------------------------------------------------
#ifndef USE_CAN
Send ; Enable tx
#ifdef USE_TXENABLE
bsf LATR_TXE, LATB_TXE
nop ;needed?
nop
nop
#endif
;Send byte
movwf TXREG_
; Wait for transmit shift register to get empty
txwait btfss TXSTA_, TRMT
bra txwait
; Disable tx
#ifdef USE_TXENABLE
bcf LATR_TXE, LATB_TXE
#endif
; Send complete
return
#endif
#ifdef USE_CAN
Send
movlb 15 ;One BANKSEL
movwf TXB0D0,BANKED
bsf TXB0CON, TXREQ ;Normal priority; Request transmission
;If required, wait for message to get transmitted
txwait BTFSC TXB0CON, TXREQ,BANKED ;Is it transmitted?
BRA txwait ;No. Continue to wait...
movlb 0
; Send complete
return
#endif
;------------------------------------------------------------------------------
; Receive()
;------------------------------------------------------------------------------
#ifndef USE_CAN
Receive movlw BLDELAY
RcvIni movwf cnt1 ;
rpt2 movlw BL10MS ;
movwf cnt2 ;
rpt3 clrf cnt3
rptc clrwdt
btfss PIR1, RCIF ;test RX
bra notrcv
movf RCREG_, w ;return read data in W
addwf crc, f ;compute crc
return
notrcv decfsz cnt3
bra rptc
decfsz cnt2
bra rpt3
decfsz cnt1
bra rpt2
; Receive timed out if we get here
bra exit
#endif
#ifdef USE_CAN
Receive movlw BLDELAY
RcvIni movwf cnt1 ;
rpt2 movlw BL10MS ;
movwf cnt2 ;
rpt3 clrf cnt3
rptc clrwdt
btfss RXB0CON, RXFUL ;Does RXB0 contain a message?
bra notrcv
movf RXB0D0, w ;Return read data in W
addwf crc, f ;Compute crc
bcf RXB0CON, RXFUL
return
notrcv decfsz cnt3
bra rptc
decfsz cnt2
bra rpt3
decfsz cnt1
bra rpt2
; Receive timed out if we get here
bra exit
#endif
;------------------------------------------------------------------------------
; End of code
;
; After reset
; Do not expect the memory to be zero,
; Do not expect registers to be initialised as described in datasheet.
;------------------------------------------------------------------------------
endSettings:
Code:
------------------------------------------------------------------------------
; Device
;------------------------------------------------------------------------------
LIST P=18F452; ;xxx
;------------------------------------------------------------------------------
; Includes
;------------------------------------------------------------------------------
#include "devices.inc"
;------------------------------------------------------------------------------
; User preferences
;------------------------------------------------------------------------------
radix DEC
#define OSCF 10000000 ;xxx oscillator frequency
#define BAUDRATE 38400 ;xxx baudrate
#define BLTIME 1000 ;xxx data receive timeout [ms]
#define BLINIT 1000 ;xxx hello receive timeout [ms]
#define HELLOTRIES 2 ;xxx number of non hello characters received before branching to the user application
#define USE_UART1 1 ;xxx uncomment to use uart1
;#define USE_UART2 1 ;xxx uncomment to use uart2
;#define USE_CAN ;xxx uncomment to use CAN instead of UART
#define USE_TXENABLE 1 ;xxx uncomment to use a tx enable pin
#ifdef USE_TXENABLE
#define TRISR_TXE TRISC ;xxx tris register containing tx enable
#define LATR_TXE LATC ;xxx port register containing tx enable
#define TRISB_TXE 5 ;xxx tris bit for tx enable
#define LATB_TXE 5 ;xxx port bit for tx enable
#endif
;------------------------------------------------------------------------------
; CAN settings
;------------------------------------------------------------------------------
#define ID_PIC 1 ;xxx node number for this device
#define ID_GUI 0x7ff ;xxx node number of the ds30 Loader gui
;------------------------------------------------------------------------------
; Advanced settings
;------------------------------------------------------------------------------
#define PROT_GOTO 1 ;xxx protect goto at 0x00
#define PROT_BL 1 ;xxx protect bootloader
#define BLPLP 7 ;bootloader placement, pages from end
#define BLSIZEP 7 ;bootloader size [pages], used by bootloader protection
;------------------------------------------------------------------------------
; Configuration bits, these macros can be found at the end of the inc-files located in
; C:\Program Files\Microchip\MPASM Suite\
;
; These can also be set in MPLAB IDE instead, they are found in Configure->Configuration bits...
;------------------------------------------------------------------------------
;config OSC = INTIO2 ;internal oscillator
;config FSCM = OFF ;failsafe clock monitor
;config IESO = OFF ;internal external switchover mode
;config PWRT = OFF ;power-up timer
;config BOR = OFF ;brown-out reset
;config BORV = 27 ;brown-out reset value
;config WDT = OFF ;watchdog timer
;config WDTPS = 1 ;1:1 WDT prescalar
;config MCLRE = ON ;MCLR
;config STVR = ON ;stack overflow reset
;config LVP = OFF ;low voltage programming
;config DEBUG = OFF ;debug
;config CP0 = OFF ;
;config CP1 = OFF ;
;config CPB = OFF ;
;config CPD = OFF ;
;config WRT0 = OFF ;
;config WRT1 = OFF ;
;config WRTB = OFF ;
;config WRTC = OFF ;
;config WRTD = OFF ;
;config EBTR0 = OFF ;
;config EBTR1 = OFF ;
;config EBTRB = OFF ;
;__CONFIG _CONFIG1L, _PLLDIV_5_1L & _CPUDIV_OSC3_PLL4_1L & _USBDIV_2_1L
;__CONFIG _CONFIG1H, _FOSC_HSPLL_HS_1H & _FCMEM_OFF_1H & _IESO_OFF_1H
;__CONFIG _CONFIG2L, _PWRT_ON_2L & _BOR_OFF_2L ; _VREGEN_OFF_2L
;__CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_1_2H
;__CONFIG _CONFIG3H, _MCLRE_ON_3H & _PBADEN_OFF_3H & _CCP2MX_OFF_3H
;__CONFIG _CONFIG4L, _DEBUG_OFF_4L & _LVP_OFF_4L & _STVREN_OFF_4L & _XINST_OFF_4L
;__CONFIG _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L
;__CONFIG _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
;__CONFIG _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L & _WRT3_OFF_6L
;__CONFIG _CONFIG6H, _WRTB_OFF_6H & _WRTC_OFF_6H & _WRTD_OFF_6H
;__CONFIG _CONFIG7L, _EBTR0_OFF_7L & _EBTR1_OFF_7L & _EBTR2_OFF_7L & _EBTR3_OFF_7L
;__CONFIG _CONFIG7H, _EBTRB_OFF_7H
__CONFIG _CONFIG1H, _OSCS_OFF_1H & _HS_OSC_1H
__CONFIG _CONFIG2L, _BOR_ON_2L & _BORV_20_2L & _PWRT_ON_2L
__CONFIG _CONFIG2H, _WDT_OFF_2H & _WDTPS_128_2H
__CONFIG _CONFIG4L, _STVR_ON_4L & _LVP_OFF_4L & _DEBUG_OFF_4LDevice:
Code:
ifdef __18F1220
#include p18F1220.inc
#define VALID_DEV 1
#define MAX_FLASH 0x1000
#define DEVICEID 1
#define ROWSIZEW 4
endif
ifdef __18F1230
#include p18F1230.inc
#define VALID_DEV 1
#define MAX_FLASH 0x1000
#define DEVICEID 2
#define ROWSIZEW 4
endif
ifdef __18F2220
#include p18F2220.inc
#define VALID_DEV 1
#define MAX_FLASH 0x1000
#define DEVICEID 3
#define ROWSIZEW 4
endif
ifdef __18F2221
#include p18F2221.inc
#define VALID_DEV 1
#define MAX_FLASH 0x1000
#define DEVICEID 4
#define ROWSIZEW 4
endif
ifdef __18F4220
#include p18F4220.inc
#define VALID_DEV 1
#define MAX_FLASH 0x1000
#define DEVICEID 5
#define ROWSIZEW 4
endif
ifdef __18F4221
#include p18F4221.inc
#define VALID_DEV 1
#define MAX_FLASH 0x1000
#define DEVICEID 6
#define ROWSIZEW 4
endif
ifdef __18F1320
#include p18F1320.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 7
#define ROWSIZEW 4
endif
ifdef __18F1330
#include p18F1330.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 8
#define ROWSIZEW 4
endif
ifdef __18F13K22
#include p18F13K22.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 9
#define ROWSIZEW 4
endif
ifdef __18F13K50
#include p18F13K50.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 10
#define ROWSIZEW 4
endif
ifdef __18F2320
#include p18F2320.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 11
#define ROWSIZEW 4
endif
ifdef __18F2321
#include p18F2321.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 12
#define ROWSIZEW 4
endif
ifdef __18F2331
#include p18F2331.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 13
#define ROWSIZEW 4
endif
ifdef __18F23K20
#include p18F23K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 14
#define ROWSIZEW 8
endif
ifdef __18F4320
#include p18F4320.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 15
#define ROWSIZEW 4
endif
ifdef __18F4321
#include p18F4321.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 16
#define ROWSIZEW 4
endif
ifdef __18F4331
#include p18F4331.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 17
#define ROWSIZEW 4
endif
ifdef __18F43K20
#include p18F43K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x2000
#define DEVICEID 18
#define ROWSIZEW 8
endif
ifdef __18F14K22
#include p18F14K22.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 19
#define ROWSIZEW 8
endif
ifdef __18F14K50
#include p18F14K50.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 20
#define ROWSIZEW 8
endif
ifdef __18F2420
#include p18F2420.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 21
#define ROWSIZEW 16
endif
ifdef __18F2423
#include p18F2423.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 22
#define ROWSIZEW 16
endif
ifdef __18F2431
#include p18F2431.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 23
#define ROWSIZEW 4
endif
ifdef __18F2450
#include p18F2450.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 24
#define ROWSIZEW 8
endif
ifdef __18F2480
#include p18F2480.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 25
#define HAS_CAN 1
#define ROWSIZEW 4
endif
ifdef __18F24K20
#include p18F24K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 26
#define ROWSIZEW 16
endif
ifdef __18F4420
#include p18F4420.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 27
#define ROWSIZEW 16
endif
ifdef __18F4423
#include p18F4423.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 28
#define ROWSIZEW 16
endif
ifdef __18F4431
#include p18F4431.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 29
#define ROWSIZEW 4
endif
ifdef __18F4450
#include p18F4450.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 30
#define ROWSIZEW 8
endif
ifdef __18F4480
#include p18F4480.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 31
#define HAS_CAN 1
#define ROWSIZEW 4
endif
ifdef __18F44K20
#include p18F44K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 32
#define ROWSIZEW 16
endif
ifdef __18F2455
#include p18F2455.inc
#define VALID_DEV 1
#define MAX_FLASH 0x6000
#define DEVICEID 33
#define ROWSIZEW 16
endif
ifdef __18F2458
#include p18F2458.inc
#define VALID_DEV 1
#define MAX_FLASH 0x6000
#define DEVICEID 34
#define HAS_CAN 1
#define ROWSIZEW 16
endif
ifdef __18F4455
#include p18F4455.inc
#define VALID_DEV 1
#define MAX_FLASH 0x6000
#define DEVICEID 35
#define ROWSIZEW 16
endif
ifdef __18F4458
#include p18F4458.inc
#define VALID_DEV 1
#define MAX_FLASH 0x6000
#define DEVICEID 36
#define ROWSIZEW 16
endif
ifdef __18F2520
#include p18F2520.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 37
#define ROWSIZEW 16
endif
ifdef __18F2523
#include p18F2523.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 38
#define ROWSIZEW 16
endif
ifdef __18F2550
#include p18F2550.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 39
#define ROWSIZEW 16
endif
ifdef __18F2553
#include p18F2553.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 40
#define ROWSIZEW 16
endif
ifdef __18F2580
#include p18F2580.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 41
#define HAS_CAN 1
#define ROWSIZEW 4
endif
ifdef __18F25K20
#include p18F25K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 42
#define ROWSIZEW 16
endif
ifdef __18F4520
#include p18F4520.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 43
#define ROWSIZEW 16
endif
ifdef __18F4523
#include p18F4523.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 44
#define ROWSIZEW 16
endif
ifdef __18F4550
#include p18F4550.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 45
#define ROWSIZEW 16
endif
ifdef __18F4553
#include p18F4553.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 46
#define ROWSIZEW 16
endif
ifdef __18F4580
#include p18F4580.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 47
#define HAS_CAN 1
#define ROWSIZEW 4
endif
ifdef __18F45K20
#include p18F45K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 48
#define ROWSIZEW 16
endif
ifdef __18F6520
#include p18F6520.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 49
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 4
endif
ifdef __18F8520
#include p18F8520.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 50
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 4
endif
ifdef __18F2525
#include p18F2525.inc
#define VALID_DEV 1
#define MAX_FLASH 0xC000
#define DEVICEID 51
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F2585
#include p18F2585.inc
#define VALID_DEV 1
#define MAX_FLASH 0xC000
#define DEVICEID 52
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F4525
#include p18F4525.inc
#define VALID_DEV 1
#define MAX_FLASH 0xC000
#define DEVICEID 53
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F4585
#include p18F4585.inc
#define VALID_DEV 1
#define MAX_FLASH 0xC000
#define DEVICEID 54
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F6527
#include p18F6527.inc
#define VALID_DEV 1
#define MAX_FLASH 0xC000
#define DEVICEID 55
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F8527
#include p18F8527.inc
#define VALID_DEV 1
#define MAX_FLASH 0xC000
#define DEVICEID 56
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F2620
#include p18F2620.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 57
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F2680
#include p18F2680.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 58
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F26K20
#include p18F26K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 59
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F4620
#include p18F4620.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 60
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F4680
#include p18F4680.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 61
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F46K20
#include p18F46K20.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 62
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F6622
#include p18F6622.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 63
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F8622
#include p18F8622.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 64
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F2682
#include p18F2682.inc
#define VALID_DEV 1
#define MAX_FLASH 0x14000
#define DEVICEID 65
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F4682
#include p18F4682.inc
#define VALID_DEV 1
#define MAX_FLASH 0x14000
#define DEVICEID 66
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F2685
#include p18F2685.inc
#define VALID_DEV 1
#define MAX_FLASH 0x18000
#define DEVICEID 67
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F4685
#include p18F4685.inc
#define VALID_DEV 1
#define MAX_FLASH 0x18000
#define DEVICEID 68
#define HAS_CAN 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F6627
#include p18F6627.inc
#define VALID_DEV 1
#define MAX_FLASH 0x18000
#define DEVICEID 69
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F6628
#include p18F6628.inc
#define VALID_DEV 1
#define MAX_FLASH 0x18000
#define DEVICEID 70
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F8627
#include p18F8627.inc
#define VALID_DEV 1
#define MAX_FLASH 0x18000
#define DEVICEID 71
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F8628
#include p18F8628.inc
#define VALID_DEV 1
#define MAX_FLASH 0x18000
#define DEVICEID 72
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F6722
#include p18F6722.inc
#define VALID_DEV 1
#define MAX_FLASH 0x20000
#define DEVICEID 73
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F6723
#include p18F6723.inc
#define VALID_DEV 1
#define MAX_FLASH 0x20000
#define DEVICEID 74
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F8722
#include p18F8722.inc
#define VALID_DEV 1
#define MAX_FLASH 0x20000
#define DEVICEID 75
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F8723
#include p18F8723.inc
#define VALID_DEV 1
#define MAX_FLASH 0x20000
#define DEVICEID 76
#define HAS_UART2 1
#define BIGEE 1
#define ROWSIZEW 32
endif
ifdef __18F452
#include p18F452.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 77
#define ROWSIZEW 4
endif
ifdef __18F458
#include p18F458.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 78
#define ROWSIZEW 4
endif
ifdef __18F448
#include p18F448.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 79
#define HAS_CAN 1
#define ROWSIZEW 4
endif
ifdef __18F258
#include p18F258.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 80
#define HAS_CAN 1
#define ROWSIZEW 4
endif
ifdef __18F248
#include p18F248.inc
#define VALID_DEV 1
#define MAX_FLASH 0x4000
#define DEVICEID 81
#define HAS_CAN 1
#define ROWSIZEW 4
endif
ifdef __18F8680
#include p18F8680.inc
#define VALID_DEV 1
#define MAX_FLASH 0x10000
#define DEVICEID 82
#define BIGEE 1
#define ROWSIZEW 4
endif
ifdef __18F25K22
#include p18F25K22.inc
#define VALID_DEV 1
#define MAX_FLASH 0x8000
#define DEVICEID 83
#define HAS_UART2 1
#define ROWSIZEW 32
endif
;------------------------------------------------------------------------------
;
;------------------------------------------------------------------------------
ifndef VALID_DEV
error "Unknown device specified"
#endifBootlader works firstly, but When I download my code bootlader is cancelled
Can you give me an example of the application is working continuously Bootloder?Please
![[Image: examplegrz.png]](http://img51.imageshack.us/img51/7517/examplegrz.png)