2017-09-26, 09:53:09
Hi
I'm trying to get ds30loader running on a PIC18F46K22. My config looks like this:
; CONFIG1H
CONFIG FOSC = INTIO67 ; Oscillator Selection bits (Internal oscillator block)
CONFIG PLLCFG = OFF ; 4X PLL Enable (Oscillator used directly)
CONFIG PRICLKEN = ON ; Primary clock enable bit (Primary clock is always enabled)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
CONFIG IESO = OFF ; Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
; CONFIG2L
CONFIG PWRTEN = OFF ; Power-up Timer Enable bit (Power up timer disabled)
CONFIG BOREN = SBORDIS ; Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
CONFIG BORV = 190 ; Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)
; CONFIG2H
CONFIG WDTEN = OFF ; Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
CONFIG WDTPS = 32768 ; Watchdog Timer Postscale Select bits (1:32768)
; CONFIG3H
CONFIG CCP2MX = PORTC1 ; CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
CONFIG PBADEN = OFF ; PORTB A/D Enable bit (PORTB<5:0> pins are configured as digital I/O on Reset)
CONFIG CCP3MX = PORTB5 ; P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
CONFIG HFOFST = ON ; HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
CONFIG T3CMX = PORTC0 ; Timer3 Clock input mux bit (T3CKI is on RC0)
CONFIG P2BMX = PORTD2 ; ECCP2 B output mux bit (P2B is on RD2)
CONFIG MCLRE = EXTMCLR ; MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)
; CONFIG4L
CONFIG STVREN = ON ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
CONFIG LVP = ON ; Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
CONFIG XINST = OFF ; Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
All memory protection is off too.
I set OSCF to 16000000
I added this to the UserInit macro:
clrf ADCON0
clrf ADCON1
clrf ADCON2
clrf ANSELA
clrf ANSELB
clrf ANSELC
clrf CM1CON0
clrf CM2CON0
clrf CM2CON1
bcf TRISA,7
bcf LATA, 7
RA7 is connected to a MUX that multiplexes UART1 to an FTDI cable and a RN171 wifi module. The signal is getting to RX1 no problem, I can see that on my scope.
I also tried this:
; Toggle pin, frequency on pin = PIC frequency / 16
if 1
bcf TRISA, 0
tsfloop bsf LATA, 0
bcf LATA, 0
bra tsfloop
endif
And yes, the pin wiggles. Yes, I put back "if 0" after that.
Can I do something when I receive a chracter? If so, what?
I'm trying to get ds30loader running on a PIC18F46K22. My config looks like this:
; CONFIG1H
CONFIG FOSC = INTIO67 ; Oscillator Selection bits (Internal oscillator block)
CONFIG PLLCFG = OFF ; 4X PLL Enable (Oscillator used directly)
CONFIG PRICLKEN = ON ; Primary clock enable bit (Primary clock is always enabled)
CONFIG FCMEN = OFF ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
CONFIG IESO = OFF ; Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
; CONFIG2L
CONFIG PWRTEN = OFF ; Power-up Timer Enable bit (Power up timer disabled)
CONFIG BOREN = SBORDIS ; Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
CONFIG BORV = 190 ; Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)
; CONFIG2H
CONFIG WDTEN = OFF ; Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
CONFIG WDTPS = 32768 ; Watchdog Timer Postscale Select bits (1:32768)
; CONFIG3H
CONFIG CCP2MX = PORTC1 ; CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
CONFIG PBADEN = OFF ; PORTB A/D Enable bit (PORTB<5:0> pins are configured as digital I/O on Reset)
CONFIG CCP3MX = PORTB5 ; P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
CONFIG HFOFST = ON ; HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
CONFIG T3CMX = PORTC0 ; Timer3 Clock input mux bit (T3CKI is on RC0)
CONFIG P2BMX = PORTD2 ; ECCP2 B output mux bit (P2B is on RD2)
CONFIG MCLRE = EXTMCLR ; MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)
; CONFIG4L
CONFIG STVREN = ON ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
CONFIG LVP = ON ; Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
CONFIG XINST = OFF ; Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
All memory protection is off too.
I set OSCF to 16000000
I added this to the UserInit macro:
clrf ADCON0
clrf ADCON1
clrf ADCON2
clrf ANSELA
clrf ANSELB
clrf ANSELC
clrf CM1CON0
clrf CM2CON0
clrf CM2CON1
bcf TRISA,7
bcf LATA, 7
RA7 is connected to a MUX that multiplexes UART1 to an FTDI cable and a RN171 wifi module. The signal is getting to RX1 no problem, I can see that on my scope.
I also tried this:
; Toggle pin, frequency on pin = PIC frequency / 16
if 1
bcf TRISA, 0
tsfloop bsf LATA, 0
bcf LATA, 0
bra tsfloop
endif
And yes, the pin wiggles. Yes, I put back "if 0" after that.
Can I do something when I receive a chracter? If so, what?