PIC24FJ128GA310 - bootloader not working

[DrBudz]

Hi,

I am trying to implement ds30 loader into PIC24FJ128GA310, but it doesn't work. GUI is not able to establish any communication. I am using MPLABX, ASM30 and MIkroe EasyPic Fusion 7 development board http://www.mikroe.com/easypic-fusion/

I tried other firmware with the board to test UART, and it is working fine.
I am running out of ideas. Here are parts of the code I entered:

Code:

.equiv     FCY,                 4000000      ;FRC 8MHz speed of internal cycle clock[Hz], used to calculate uart brg and delay
        .equiv    BLINIT,                3000        ;xxx hello receive timeout [ms]
        .equiv    HELLOTRIES,            2            ;xxx number of non hello characters received before branching to the user application    
        .equiv    BLTIME,                3000        ;xxx data receive timeout [ms]

Code:

config    __CONFIG1, JTAGEN_OFF/*JTAG*/ & GCP_OFF/*code protect*/ & GWRP_OFF/*write protect*/ /*& BKBUG_OFF/*background debugger*/ /*& COE_OFF/*clip-on emulation mode*/ & ICS_PGx1/*icd pins select*/ & FWDTEN_WDT_DIS/*watchdog timer*/ & WINDIS_OFF/*windowed wdt*/ & FWPSA_PR32/*watchdog prescalar*/ & WDTPS_PS1/*watchdog postscalar*/
            config    __CONFIG2, IESO_OFF/*two-speed startup*/ & FNOSC_FRC/*oscillator selection*/ & FCKSM_CSDCMD/*clock switching and clock monitor*/ & OSCIOFCN_ON/*OSC0/RC15 function*/ & POSCMD_NONE/*oscillator selection*/ & IOL1WAY_OFF /*IO unlock enable*/
            config     __CONFIG3, WPEND_WPSTARTMEM/*write protect range selection*/ & WPCFG_WPCFGDIS/*write protection config page*/ & WPDIS_WPEN/*write protection*/ & WPFP_WPFP8/*Write Protection Flash Page*/ & BOREN_ON & VBTBOR_OFF & SOSCSEL_OFF
            config  __CONFIG4, DSWDTPS_DSWDTPS1C /*DeepSleep WDT 77h*/ & DSWDTOSC_LPRC /*LPRC as DPSleep clock*/ &    DSBOREN_ON & DSWDTEN_ON /*DeepSleep WDT ON*/ &DSSWEN_ON /*Deep sleep controlled by DSEN*/

Code:

;------------------------------------------------------------------------------
; UserInit()
; Description: this is executed immediately on start-up before the boot loader code
;------------------------------------------------------------------------------
        .macro UserInit
            
            bclr TRISF, #RF5 ;output pin (TX)
            bclr LATF,  #RF5 ; reset TX pin
            bset TRISF, #RF4 ;input pin (RX)
            
            ;----------------------------------------------------------------------
            ; Make uart pins digital
            ;----------------------------------------------------------------------
            .ifdecl ADPCFGL                
                ;.error "Do you need to configure communication pins to be digital? If not, remove this line"
                ;PORTF HAS ONLY DIGITAL PINS
            .else
                .ifdecl AD1PCFGL
                    .error "Do you need to configure communication pins to be digital? If not, remove this line"
                .endif
            .endif             
            
            ;----------------------------------------------------------------------
            ; UART/CAN pps config
            ;----------------------------------------------------------------------
            .ifdef HAS_PPS
                ;.error "PPS is not configured. More information in the firmware manual."            ;xxx remove this line when PPS is configured                        
            
                ; ** IMPORTANT **
                ;
                ; THIS CODE IS JUST A TEMPLATE AND WILL MOST LIKELY NOT WORK FOR YOU,
                ; READ THE DATASHEET AND ALTER LINES MARKED WITH XXX
                ;
                ; ** IMPORTANT **

                ;__builtin_write_OSCCONL(OSCCON & 0xbf) //clear the bit 6 of OSCCONL to unlock Pin Re-map
                 push w1
                 push w2
                 push w3
                 mov #OSCCON, w1
                 mov #0x46, w2
                 mov #0x57, w3
                 mov.b w2, [w1]
                 mov.b w3, [w1]
                 bclr OSCCON, #6
                 pop w3
                 pop w2
                 pop w1

                ; Receive, map pin RF4(0x0A 10 = 1010) to uart
                bclr    RPINR19, #U2RXR0        ;xxx
                bset    RPINR19, #U2RXR1        ;xxx
                bclr    RPINR19, #U2RXR2        ;xxx
                bset    RPINR19, #U2RXR3        ;xxx
                bclr    RPINR19, #U2RXR4        ;xxx
                bclr    RPINR19, #U2RXR5
                                
                ; Transmit, map uart to pin RF5(0x05 5 =101=U2TX)
                bset    RPOR8, #RP17R0            ;xxx
                bclr    RPOR8, #RP17R1            ;xxx
                bset    RPOR8, #RP17R2            ;xxx
                bclr    RPOR8, #RP17R3            ;xxx
                bclr    RPOR8, #RP17R4            ;xxx
                bclr    RPOR8, #RP17R5            ;xxx

               ;Lock IO pins  (__builtin_write_OSCCONL(OSCCON | 0x40) //set the bit 6 of OSCCONL to lock Pin Re-map
                push w1
                push w2
                push w3
                mov #OSCCON, w1
                mov #0x46, w2
                mov #0x57, w3
                mov.b w2, [w1]
                mov.b w3, [w1]
                bset OSCCON, #6
                pop w3
                pop w2
                pop w1
               ;//////////////////////////////////////////////////////
            .endif    
        
        ; End of macro
        .endm

---

Code looks a little bit messy here, so I am putting the zip file.
Any help is appreciated, since I am getting desperate.

The osc selected is internal FRC, 1:1, 8Mhz.
PPS pins UART2 RX->RF4, TX ->RF5
Watchdog disabled.

I took default gld file for 24Fj128GA310 from MPASM 30.

Thank you!

[Mikael Gustavsson]

Hi,
I will take a look at it when I get time. Customers of the commercial versions goes first..

BR

[Mikael Gustavsson]

Hi,
Does the oscillator need to be set to operate at 8MHz?

[DrBudz]

Hi,
Does the oscillator need to be set to operate at 8MHz?

Hi Mikael,

Thank you for feedback.

Internal FRC osc is 8MHz, without postscaler, so internal clock is
FRC/2= 4MHz. I've tried both 8MHz and 4MHz for FCY, but it is the same, it doesn't work. It looks like it is in reset all the time. Watchdog is disabled.

[Mikael Gustavsson]

The FRC defaults to 4MHz, you need to set it up for 8MHz operation. See the CLKDIV register on page 149 in the datasheet.