2010-11-30, 21:56:54
Maybe I found the solution in the datasheet:
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be cleared (= 0) for Asynchronous and Synchronous Master modes
Try to add 2 lines to set/clear them.
• bit TRISC<7> must be set (= 1)
• bit TRISC<6> must be cleared (= 0) for Asynchronous and Synchronous Master modes
Try to add 2 lines to set/clear them.