2011-03-08, 21:30:18
I did solve my problem.
In fact I just define all the CONFIG bits, which was not the case before.
In case someone is interested here is the definition of the bits:
CONFIG DEBUG = OFF
CONFIG FOSC = HSPLL
CONFIG WDTEN = OFF ;wathcdog timer
CONFIG STVREN = OFF ;stack over-/underflow reset
CONFIG XINST = OFF ;extended instruction set
CONFIG CP0 = OFF ;code protect
CONFIG FCMEN = ON ;fail-safe clock monitor
CONFIG IESO = ON ;Internal External Osc. SO Mode
CONFIG WDTPS = 128 ;watchdog postscaler
CONFIG CCP2MX = DEFAULT
CONFIG MSSPMSK = MSK7
CONFIG PLLDIV = 5
CONFIG CPUDIV = OSC1
Thanks anyway.
In fact I just define all the CONFIG bits, which was not the case before.
In case someone is interested here is the definition of the bits:
CONFIG DEBUG = OFF
CONFIG FOSC = HSPLL
CONFIG WDTEN = OFF ;wathcdog timer
CONFIG STVREN = OFF ;stack over-/underflow reset
CONFIG XINST = OFF ;extended instruction set
CONFIG CP0 = OFF ;code protect
CONFIG FCMEN = ON ;fail-safe clock monitor
CONFIG IESO = ON ;Internal External Osc. SO Mode
CONFIG WDTPS = 128 ;watchdog postscaler
CONFIG CCP2MX = DEFAULT
CONFIG MSSPMSK = MSK7
CONFIG PLLDIV = 5
CONFIG CPUDIV = OSC1
Thanks anyway.