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PIC24FJ64GA104 Issue
#1
Sad 
Hi all,
I'm using ds30 with different PIC 18F and it works very good!!
Now I'm trying to use it with PIC24FJ64GA104 but I'm not able to communicate...it seems there is no response from pic so GUI goes in timeout.
I'm using UART1 configured as:

RB14 (RP14) -> U1_TX
RB15 (RP15) -> U1_RX

External 8MHz crystal connected to pin 30-31.

I already configured UART1 mapping anche disabled the ADC converter in user_code.inc

;make UART1 pin Digital
bset AD1PCFG, #PCFG9
bset AD1PCFG, #PCFG10

; map pin (15 = 1111) to uart1rx
bset RPINR18, #U1RXR0 ;xxx
bset RPINR18, #U1RXR1 ;xxx
bset RPINR18, #U1RXR2 ;xxx
bset RPINR18, #U1RXR3 ;xxx
bclr RPINR18, #U1RXR4 ;xxx

; map uart1tx (3) to pin 14
bset RPOR7, #RP14R0 ;xxx
bset RPOR7, #RP14R1 ;xxx
bclr RPOR7, #RP14R2 ;xxx
bclr RPOR7, #RP14R3 ;xxx
bclr RPOR7, #RP14R4 ;xxx


I already changed the following line in setting.inc file:

; Device
.equ __24FJ64GA104, 1

; User preferences
.equiv FCY, 8000000

; UART settings
.equiv USE_UART1, 1


....I really don't understand why it doesn't work!!

In attached you can find the bootloader Mplab 8 project.
Thanks in advance to everybody!!

Regards,
Nicola


Attached Files
.zip   Bootloader 24FJ64GA104.zip (Size: 64.66 KB / Downloads: 18)
Reply
#2
Hi,
What is the default speed of the FRC?
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#3
(2015-12-18, 20:51:06)Mikael Gustavsson Wrote: Hi,
What is the default speed of the FRC?

FRC default speed should be 8 MHz bitbut I'm not using it... I'm using an external HS 8MHz osc.
Reply
#4
Try setting fcy to 4000000. From the datasheet:
Quote:The processor clock source is divided by two to produce the internal instruction cycle clock, FCY.
Reply
#5
(2015-12-21, 22:46:24)Mikael Gustavsson Wrote: Try setting fcy to 4000000. From the datasheet:
Quote:The processor clock source is divided by two to produce the internal instruction cycle clock, FCY.

Now it communicate perfectly!! Thanks!!

Now I have an other problem related to "bl protection tripped"
Using the GUI in debug mode it shows the following print:

Searching for bl . . . .
Found PIC24FJ64GA104 fw ver. 4.0.3
Boot loader placement/size: 2/1
Waiting for the boot loader to be ready...ok
Hex file successfully parsed in 0ms
Writing flash....
Erasing page 0 @ 0x0000...ok
Writing row 0 @ 0x0000...ok
Writing row 1 @ 0x0080...ok
Writing row 2 @ 0x0100...ok
[.........]
Writing row 327 @ 0xA380...ok
Erasing page 41 @ 0xA400...ok
Writing row 328 @ 0xA400...bl protection tripped
Write flash failed
Closing port
Tx 63,9kB / Rx 375 bytes / 39s
Write failed

Loading the fw it shows the following print:

Parsing hexfile...
File timestamp: 13/12/2015 11:14:39 AM
Opening hexfile...ok
Validating hexfile...ok
Application vector address: 0xA3FC
Application address: 0x200
Last row containing configs was found in hex file, last page has been disabled. Consult the main manual for more information.
Main flash page 0 is used, 0x00 - 0x3FF
Main flash row 0 is used, 0x00 - 0x7F
Main flash row 1 is used, 0x80 - 0xFF
Main flash row 2 is used, 0x100 - 0x17F
[.........]
Main flash row 342 is used, 0xAB00 - 0xAB7F
Main flash row 343 is used, 0xAB80 - 0xABFF
Bootloader is located in the main flash
Bootloader start address: 0xA400
Bootloader end address: 0xA7FF
Bootloader start page: 41
Bootloader end page: 41
Bootloader start row: 328
Bootloader end row: 335
Hex file successfully parsed in 56ms


I'm using the following fuses on the pic:

config __CONFIG4, DSWDTPS_DSWDTPSF & DSWDTOSC_LPRC & DSBOREN_ON & RTCOSC_LPRC & DSWDTEN_ON
config __CONFIG3, WPDIS_WPDIS & WPFP_WPFP41 & WUTSEL_LEG & WPEND_WPENDMEM & WPCFG_WPCFGDIS & SOSCSEL_IO
config __CONFIG2, IESO_OFF & IOL1WAY_OFF & FNOSC_PRIPLL & I2C1SEL_PRI & POSCMOD_XT & OSCIOFNC_ON & FCKSM_CSDCMD
config __CONFIG1, WDTPS_PS32768 & ICS_PGx3 & FWPSA_PR128 & WINDIS_OFF & GWRP_OFF & GCP_OFF & FWDTEN_OFF & JTAGEN_ON


What could be the cause of this issue???

Thanks!!!
Reply
#6
(2015-12-22, 11:07:01)cinpezzo Wrote:
(2015-12-21, 22:46:24)Mikael Gustavsson Wrote: Try setting fcy to 4000000. From the datasheet:
Quote:The processor clock source is divided by two to produce the internal instruction cycle clock, FCY.

Now it communicate perfectly!! Thanks!!

Now I have an other problem related to "bl protection tripped"
Using the GUI in debug mode it shows the following print:

     Searching for bl . . . .
     Found PIC24FJ64GA104 fw ver. 4.0.3
     Boot loader placement/size: 2/1
     Waiting for the boot loader to be ready...ok
     Hex file successfully parsed in 0ms
     Writing flash....
           Erasing page 0 @ 0x0000...ok
           Writing row 0 @ 0x0000...ok
           Writing row 1 @ 0x0080...ok
           Writing row 2 @ 0x0100...ok
           [.........]
           Writing row 327 @ 0xA380...ok
           Erasing page 41 @ 0xA400...ok
           Writing row 328 @ 0xA400...bl protection tripped
           Write flash failed
     Closing port
     Tx 63,9kB / Rx 375 bytes / 39s
     Write failed

Loading the fw it shows the following print:

     Parsing hexfile...
     File timestamp: 13/12/2015 11:14:39 AM
     Opening hexfile...ok
     Validating hexfile...ok
     Application vector address: 0xA3FC
     Application address: 0x200
     Last row containing configs was found in hex file, last page has been disabled. Consult the main manual for more information.
     Main flash page 0 is used, 0x00 - 0x3FF
     Main flash row 0 is used, 0x00 - 0x7F
     Main flash row 1 is used, 0x80 - 0xFF
     Main flash row 2 is used, 0x100 - 0x17F
      [.........]
     Main flash row 342 is used, 0xAB00 - 0xAB7F
     Main flash row 343 is used, 0xAB80 - 0xABFF
     Bootloader is located in the main flash
     Bootloader start address: 0xA400
     Bootloader end address: 0xA7FF
     Bootloader start page: 41
     Bootloader end page: 41
     Bootloader start row: 328
     Bootloader end row: 335
     Hex file successfully parsed in 56ms


I'm using the following fuses on the pic:

config __CONFIG4, DSWDTPS_DSWDTPSF & DSWDTOSC_LPRC & DSBOREN_ON & RTCOSC_LPRC & DSWDTEN_ON
config __CONFIG3, WPDIS_WPDIS & WPFP_WPFP41 & WUTSEL_LEG & WPEND_WPENDMEM & WPCFG_WPCFGDIS & SOSCSEL_IO
config __CONFIG2, IESO_OFF & IOL1WAY_OFF & FNOSC_PRIPLL & I2C1SEL_PRI & POSCMOD_XT & OSCIOFNC_ON & FCKSM_CSDCMD
config __CONFIG1, WDTPS_PS32768 & ICS_PGx3 & FWPSA_PR128 & WINDIS_OFF & GWRP_OFF & GCP_OFF & FWDTEN_OFF & JTAGEN_ON


What could be the cause of this issue???

Thanks!!!


I understood the problem...I was trying with an hex file uploaded from pic via PicKit3 so its size match the size of the pic memory and it overwrites the bootloader memory area; so this caused the "bl protection tripped" error. Using a compiled hex file with smaller size the bootloader works perfectly.
Thanks for your great support!!

Nicola
Reply
#7
Great! Thanks for the report.
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