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frequency question [abandoned]
#1
Hi,

In my application I use the p33FJ256MC710 with UART1, frequency RUN application is 80MHz.
This is my setting in application:
Code:
_FOSCSEL(FNOSC_PRIPLL & IESO_OFF)
_FOSC(FCKSM_CSDCMD & OSCIOFNC_OFF & POSCMD_XT)
_FWDT(FWDTEN_OFF & WINDIS_OFF)

main(){
    _PLLPRE = 0;     // 4Mhz crystal / 2 = 2Mhz
    _PLLDIV = 74;  
    _PLLPOST = 0;    /80Mhz / 2 = ***40 Mips***
    _DOZE = 0;
    while(OSCCONbits.LOCK!=1) {};    // Wait for PLL to lock

.............
............
.............
..............
.............
}


I want use bootloader with UART1 , but the problem is how setting frequency 80Mhz in the code of boot loader the frequency is max 40MhzHuh
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#2
See section 8.1 in the family data sheet. fcy = fosc / 2.
Setting fcy=40 means you should have fosc = 80
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#3
(2010-12-31, 14:11:59)Mikael Gustafsson Wrote: See section 8.1 in the family data sheet. fcy = fosc / 2.
Setting fcy=40 means you should have fosc = 80

Hi ,

I change this code in setting file:
Code:
        .equ     FCY,         40000000
        .equ     BAUDRATE,     115200
        .equ    BLTIME,        3000

and in ds30loader.s file I change this for work PLL at 40Mips:

Code:
;------------------------------------------------------------------------------
; Init
;------------------------------------------------------------------------------
        clr        WDOERASE
;    _PLLPRE = 0;
;    _PLLDIV = 74;
;    _PLLPOST = 0;
;    _DOZE = 0;
;    while(OSCCONbits.LOCK!=1) {};

        bclr CLKDIV,#PLLPRE0        
        bclr CLKDIV,#PLLPRE1        
        bclr CLKDIV,#PLLPRE2        
        bclr CLKDIV,#PLLPRE3        
        bclr CLKDIV,#PLLPRE4        

        bclr PLLFBD,#PLLDIV0
        bset PLLFBD,#PLLDIV1
        bclr PLLFBD,#PLLDIV2
        bset PLLFBD,#PLLDIV3
        bclr PLLFBD,#PLLDIV4
        bclr PLLFBD,#PLLDIV5
        bset PLLFBD,#PLLDIV6
        bclr PLLFBD,#PLLDIV7
        bclr PLLFBD,#PLLDIV8

        bclr CLKDIV,#PLLPOST0
        bclr CLKDIV,#PLLPOST1

        bclr CLKDIV,#DOZE0
        bclr CLKDIV,#DOZE1
        bclr CLKDIV,#DOZE2
waitPLLl:
        btsc OSCCON,#LOCK
        bra     waitPLLl                

        ;        
        ;bset    TRISB, #TRISB14         ;make input (datasheet pg 157)
        ;bset    AD1PCFGL, #PCFG9        ;analog pin to digital
        ;bset    AD1PCFGL, #PCFG10        ;analog pin to digital

But not work Huh

Happy New Years
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#4
Sorry, I missed your last post.

Please verify the actual frequency the PIC is running at after your pll initialization.
Personally I prefer do put a while loop that toggles a pin then look at it on an oscilloscope.
Let me know the result.
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